The CIO-DAS800 Series includes the following hardware:
CIO-DAS800 Series supports the following UL and UL for .NET features.
Functions
UL: cbAIn(), cbAInScan(), cbATrig(), cbFileAInScan()
UL for .NET: AIn(), AInScan(), ATrig(), FileAInScan()
Options
BACKGROUND, CONTINUOUS, EXTCLOCK, CONVERTDATA, SINGLEIO, BLOCKIO, EXTTRIGGER
HighChan
0 to 7
Rate
CIO-DAS802/16:
100,000
All others in the series:
50,000
Range
CIO-DAS800:
Ignored - Not programmable
CIO-DAS801:
| BIP10VOLTS (±10 volts) | UNI10VOLTS (0 to 10 volts) |
| BIP5VOLTS (±5 volts) | UNI1VOLTS (0 to 1 volts) |
| BIP1VOLTS (±1 volts) | UNIPT1VOLTS (0 to 0.1 volts) |
| BIPPT5VOLTS (±0.5 volts) | UNIPT01VOLTS (0 to 0.01 volts) |
| BIPPT05VOLTS (±0.05 volts) | |
| BIPPT01VOLTS (±0.01 volts) |
CIO-DAS802:
| BIP10VOLTS (±10 volts) | UNI10VOLTS (0 to 10 volts) |
| BIP5VOLTS (±5 volts) | UNI5VOLTS (0 to 5 volts) |
| BIP2PT5VOLTS (±2.5 volts) | UNI2PT5VOLTS (0 to 2.5 volts) |
| BIP1PT25VOLTS (±1.25 volts) | UNI1PT25VOLTS (0 to 1.25 volts) |
| BIPPT625VOLTS (±0.625 volts) |
CIO-DAS802/16:
| BIP10VOLTS (±10 volts) | UNI10VOLTS (0 to 10 volts) |
| BIP5VOLTS (±5 volts) | UNI5VOLTS (0 to 5 volts) |
| BIP2PT5VOLTS (±2.5 volts) | UNI2PT5VOLTS (0 to 2.5 volts) |
| BIP1PT25VOLTS (±1.25 volts) | UNI1PT25VOLTS (0 to 1.25 volts) |
These boards do not have D/A converters, and do not support analog output functions.
Functions
UL: cbDIn(), cbDOut(), cbDBitIn(), cbDBitOut()
UL for .NET: DIn(), DOut(), DBitIn(), DBitOut()
PortNum
AUXPORT (not configurable for these boards)
DataValue
UL: 0 to 15 using cbDOut(), 0 to 7 using cbDIn()
UL for .NET: 0 to 15 using DOut(), 0 to 7 using DIn()
BitNum
0 to 3 using cbDBitOut()/DBitOut()
0 to 2 using cbDBitIn()/DBitIn()
Functions
UL: cbC8254Config(), cbCIn(), cbCLoad()
UL for .NET: C8254Config(), CIn(), CLoad()
CounterNum
1 to 3
Config
HIGHONLASTCOUNT, ONESHOT, RATEGENERATOR, SQUAREWAVE, SOFTWARESTROBE, HARDWARESTROBE
LoadValue
0 to 65,535 (Refer to 16-bit values using a signed integer data type for information on 16-bit values using unsigned integers.)
Hardware pacing, external or internal clock supported.
The packet size is 128 samples.
Note that digital output is not compatible with concurrent cbAInScan()/AInScan() operation, since the channel multiplexor control shares the register with the digital output control. Writing to this register during a scan may adversely affect the scan.
Digital hardware triggering supported.